Cover image for Design of cost-efficient interconnect processing units Spidergon STNoC
Title:
Design of cost-efficient interconnect processing units Spidergon STNoC
Author:
Coppola, Marcello.
ISBN:
9781420044720
Publication Information:
Boca Raton [Fla.] : CRC Press, c2009.
Physical Description:
xxi, 263 p. : ill.
Series:
System-on-chip design and technologies
Series Title:
System-on-chip design and technologies
Contents:
1. Towards multicores : technology and software complexity -- 2. On-chip bus vs. network-on-chip -- 3. NoC topology -- 4. The Spidergon STNoC -- 5. SoC and NoC design methodology and tools -- 6. Conclusions and future work -- References -- Index.
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